ENEE640: Digital CMOS VLSI Design
Graduate Course, University of Maryland, College Park, Spring 2021
Review of MOS transistors: fabrication, layout, characterization; CMOS circuit and logic design: circuit and logic simulation, fully complementary CMOS logic, pseudo-nMOS logic, dynamic CMOS logic, pass-transistor logic, clocking strategies; sub system design: ALUs, multipliers, memories, PLAs; architecture design: datapath, floorplanning, iterative cellular arrays, systolic arrays; VLSI algorithms; chip design and test: full custom design of chips, possible chip fabrication by MOSIS and subsequent chip testing.