Teaching

CMPE361: Introduction to Hardware Security

Undergraduate Course, Rochester Institue of Technology, Fall 2023

The objective of this course is to build the knowledge and skills necessary to design, evaluate, and implement secure hardware systems. Course topics will span the fundamentals of hardware security and trust, which may include security principles and properties, encryption/decryption, side-channel attacks, hardware manufacture and test, physically uncloneable functions (PUF), true random number generation, hardware trojan detection, secure system design, and trusted execution environments. Laboratory assignments and projects facilitate the hands-on learning of course topics including cryptographic hardware design, side-channel attacks, integrated circuit test and verification, PUFs, true random number generation, and secure system design using a field programmable gate array (FPGA) and an embedded processor as an implementation platform.

CMPE530/630: Digital IC Design

Undergraduate/Graduate Course, Rochester Institue of Technology, Spring 2023

This course will cover the basic theory and techniques of Digital Integrated Circuit Design in CMOS technology. Topics include CMOS transistor theory and operation, design and implementation of CMOS circuits, fabrication process, layout and physical design, delay and power models, static and dynamic logic families, testing and verification, memory and nanoscale technologies. Laboratory assignments and project facilitate in hands-on learning of circuit-level design and simulation, layout and parasitic extractions, pre and post-layout verification and validation, full- custom flow and Synthesis based flow, using industry standard CAD tools.

ENEE640: Digital CMOS VLSI Design

Graduate Course, University of Maryland, College Park, Spring 2021

Review of MOS transistors: fabrication, layout, characterization; CMOS circuit and logic design: circuit and logic simulation, fully complementary CMOS logic, pseudo-nMOS logic, dynamic CMOS logic, pass-transistor logic, clocking strategies; sub system design: ALUs, multipliers, memories, PLAs; architecture design: datapath, floorplanning, iterative cellular arrays, systolic arrays; VLSI algorithms; chip design and test: full custom design of chips, possible chip fabrication by MOSIS and subsequent chip testing.